Fewer Monitor Wafers, Calibrate & Sign Off in Days
From a single monitor wafer, directly compute exact focus and dose adjustments—ending weeks of blind trial-and-error wafer runs.
-70%Tool qualification cycle · Target reached in 1-2 runs
02 · CROSS-STEP DEFECT ATTRIBUTION
Compare Pre & Post Images, Pinpoint Step Responsibility on the Spot
Overlay pre-step and post-step inspection maps of the same wafer to automatically subtract inherited defects and isolate net-new additions.
100% IsolatedUpstream defects filtered · End cross-team blame games
03 · FALSE-ALARM RETUNING
Spiking Tool False Alarms, Retuned Locally in One Click
Process changes often cause inline inspection models to flag good wafers. Without exporting sensitive wafer images, field engineers recalibrate thresholds on-site in one click.
18.4% -> 1.2%False-alarm rate restored on-site · Zero data egress
04 · DOCUMENT EXPERIENCE REUSE
Learn from Past & New Documents, Never Repeat Solved Mistakes
Most issues during tool installation or Fab production have happened before. The platform extracts and learns experience from existing and newly accumulated documents to guide engineers on the spot.
Continuous LearningExtracts from existing & new docs · Instant solution reuse
How does it advance investigations?
02 / AGENT IN ACTION
Let Agent operate the workspace. Keep every step visible to engineers.
The Agent inspects imagery and prior runs, executes standard checks first, and runs targeted analyses on demand.Grounding decisions in accumulated evidence and verified engineering method specs.
Turn raw data, into grounded engineering recommendations.
Automates routine analysis across more wafers, time windows, and operating conditions, surfacing valuable clues and candidate causes. Engineers inspect evidence layer-by-layer, steer investigation directions, and advance findings into tuning and validation plans.
Diagnostic reports and recommendations, backed by complete investigative evidence.
A comprehensive report outlining current diagnosis, recommended actions, and validation procedures, with every suggestion tied to analytical traces, evidence, and open questions.
Tool Qualification
Process Excursion
Model Diagnosis
Report Deliverable Overview
Tool Ramp QualificationEE / PE · Equipment & Process Engineering
Codify engineering experience, into actionable Agent method specs.
Derived from process specs, equipment manuals, standard analytical practices, and cleanroom field experience, forming reviewable, version-controlled method specs validated against precise applicability boundaries.
EXPERTISE / From Experience to ActionMethod Codification Flow
01 Field Experience
02 Expert Review
03 Spec Execution
04 Continuous Asset
“Verify scan area first, compare defect distributions second.
Engineer Knowledge FoundationsProcess Specs · Tool Manuals · Field Practice
Extract
EXPERTISE PACKAGE
Wafer Comparison Spec
v1.1
01
PrerequisitesComparable Scan Area
02
Method ProtocolVerify First, Compare Second
03
Evidence StandardAuditable Provenance & Metrics
✓Expert Verified
Reviewable · Editable · Version-Controlled
Team Knowledge AssetSpec Files · Protocols & Boundaries
Load
Agent Workspace
HARNESS / Execution Runtime
Method Spec+Current Data+Analysis Tools
✓Scan Area Verified
Audit Area→Compare Patterns→Store Traces
Active Basis · Method Spec v1.0
Agent ExecutionSpecs Guide Action · Traces Stored with Output
New cases undergo expert review to enter next spec release
04 / 04
Verified experience fuels the next investigation.
Retains current investigation evidence, audits novel failure modes and methods, and publishes updated spec packages.
Deep DiveMethod Specs, Runtime Harness & ExtensibilityExpand
From experience to execution, and on to next-round reuse.Method Architecture Overview
One architecture, scalable to new engineering domains.
Method specs govern how judgments are formed; tool contracts define what actions can be executed. New engineering tasks simply plug in validated tools.
Wafer Image Spatial AnalysisActive Production Pilot
Defect Model Recovery & TuningExpansion Track
Recipe Parameter StudyExpansion Track
Wafer Analysis: Comparability specs, scientific computing tools, and evidence standards together power continuous investigation.
Experience belongs to the engineering team.
Codifies senior engineers' intuition and historical lot post-mortems into transparent, reviewable, and reusable team assets.
Specs guide every step of the workflow.
The Harness bridges specifications with ingested lot data, compute tools, and runtime verification; the Agent operates strictly within valid bounds.
Capabilities scale cleanly through specs.
Expand to new engineering tasks with modular spec packages, tool contracts, and benchmark lots while sharing the proven runtime harness.
Engineering expertise is managed as modular specs, published after expert review, and reused across future investigations.
ArchitectureHow Experience, Computing, and Evidence CollaborateView Architecture
PURPOSE-BUILT AGENT ARCHITECTURE
Designed specifically for semiconductor image analysis.
TranslatingFab engineering expertise and senior analytical methodsinto applicability prerequisites, scientific computing routines, and rigorous evidence standards. Our Agent architecture advances along these engineering constraints to form a closed-loop investigation.
FAB ENGINEERING EXPERTISE
Understanding the cleanroom: knowing what questions to ask.
Incorporates tool state, recipe parameters, review optics, and comparison goals into the run, pinpointing which clues warrant DOE and what data must be fetched.
SENIOR ANALYTICAL METHODS
Definitive methods: knowing how to validate hypotheses.
Verifies population sample sizes, active inspected areas, analysis metrics, and baseline definitions to clearly distinguish observations from engineering explanations.
AUTONOMOUS AGENTInvestigation & PlanningInspects available data, selects next action, and steers trajectory based on quantitative metrics.
↔
SCIENTIFIC EXECUTIONAnalysis & Scientific ComputeExecutes rigorous algorithms on defined inputs, returning fully auditable calculations.
→
EVIDENCE & PROVENANCEFindings & Evidence TracesLinks raw wafer imagery, computational formulas, result revisions, and remaining evidence gaps.
Observe→Select Action→Execute→Verify→Update
Engineer · Confirm scope, pause, intervene, review findings, and schedule DOE
How do I audit its conclusions?
07 / EVIDENCE & AUDITABILITY
White-box AI Agent: every recommendation backed by verifiable evidence.
From full-wafer imagery and recipe parameters to actionable engineering recommendations. Inputs, method specs, computations, and execution traces are auditable layer by layer.
Dual-Source InputsWhite-Box Analytics · Every Step AuditableEngineering Recommendations
Data & Compute Relations Hypotheses Pending Validation
Engineering AdvisoryAudit Variations First, Isolate Causes SecondInspection & Unit Steps · PE / PIEScreen candidate hypotheses before scheduling validation DOE
FINDINGOuter Ring Defect ConcentrationImage Review · Finding F-02
VALIDATIONCandidate Hypotheses Pending ValidationEvidence Gap Logged · Next Check Scheduled
From inputs to recommendations, every layer of evidence opens automatically.
02 / 04
Every investigative branch leads directly to its underlying evidence.
WHITE BOXEvidence Retained with Findings
Traceable InputsImage and recipe context snapshots
Grounded MethodsDomain expertise and verified applicability bounds
Verifiable ComputeStandardized formulas and statistical parameters
Logged ExecutionTool call parameters and result revisions
Engineering Advisory
Confirm temporal deltas before isolating root causes.
Audit inspection conditions and intra-wafer progression first, then leverage recipe and tool logs to isolate candidate hypotheses. Recommended parameter adjustments require direct empirical evidence and validation DOEs.
Advisory Bounds & ConfidenceSpatial Distribution Quantified · Root Cause Pending Validation
Retains supporting evidence, gaps, and non-excluded candidate hypotheses. Recommendations provided for engineer review; correlated leads still require validation.
What engineering experience do we want to deliver?
08 / OUR MISSION
Exploring the next generation of semiconductor analysis and validation.
Starting from Fab image analysis and yield learning, we bring engineers and specialized AI agents onto a unified workbench to investigate continuously, compute rigorously, and verify every finding together.
Transforming one-off reports into an ongoing engineering journey. New problems, fresh lot data, and emerging discoveries connect seamlessly inside the same shared context.
RESOURCES & DOCUMENTATION
Explore use cases, and inspect our engineering methods.